G.NARAYANAMMA INSTITUTE OF TECHNOLOGY & SCIENCE
SHAIKPET, HYDERABAD 8
III / IV - B.TECH II SEMESTER V QUIZ EXAMINATION
SUBJECT: MPMC Regd.No:________
BRANCH: ECE 1 & 2 Max.Marks: 20
Time: 20 Mins
- The 8051 is a 8 bit _____________________.
- The 8051 is based on _____________ architecture.
- The 8051 is
_______ ________ byte ordered microcontroller.
- The EA signal(pin) is for __________ _________ of
- The ram available at address 80H to FFfH is called
- The SFRs can
only be addressed ________________.
- The address space of
internal ROM is from ________H to _______H.
- Bank selection bits in PSW are 0 & 1, R7 now
refers to memory location ______.
- The Timer mode is set by the ___________ SFR.
- The Timer Run bit is available in __________SFR.
- The timer mode 0 uses __________ bits for timing.
- If the Crystal frequency is 12Mhz, the clock for the
timer is ____ Mhz.
- The Machine cycle of 8051 consists of ______ states
- This is a program for delay produced by executing the instruction DJNZ which
takes 2 machine cycles.
(a) One of
the loop back label is wrong, correct it .
(b) What is the
number of times the program executes before
it returns to the calling program.
- The priority of the interrupts in highest to lowest(1
to 5) is
- The Enable all interrupts is in register
- The MOVX is used to access ______________ _____________
- The ________
& _________ are 16 bit registers